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基于FPGA和CPU综合控制星上时间管理系统设计 被引量:2

Design of integrated time management system based on FPGA and CPU
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摘要 时间管理系统作为卫星中的重要组成部分,完成整星的时间管理功能。当前常见的设计方式是单一使用CPU利用软件进行管理实现,该方法具有节省硬件开销的优点,但也有因需占用CPU资源,易造成CPU资源紧张的缺点,同时由于其他任务的存在,易造成时间管理系统的响应时间受到CPU其他任务的影响而导致精度不高的缺点。基于上述分析,提出了一种基于现场可编程门阵列(FPGA)和CPU综合控制的主动与被动相结合管理方法。以FPGA作为时间管理机制实现的具体载体,CPU对时间管理系统采用的机制进行管理;充分利用了FPGA的设计效率和CPU的控制灵活性,具有很高的可靠性,集成度,灵活性和适应性。目前该方法已应用于多个航天任务,实践证明,系统性能良好,在轨工作状态稳定,具有较高的可靠性。 As an important part of the satellite,the time management system completes the time management function At present,a common design method is to use a CPU to implement management by software.This method has the advantage of saving hardware overhead.However,it also occupies the shortcomings of CPU resources due to the need to occupy CPU resources.At the same time,it is easy to cause time due to other tasks.The response time of the management system is affected by other tasks of the CPU,resulting in the disadvantage of low accuracy.Based on the above analysis,this paper proposes a combined active and passive management method based on the integrated control of field programmable gate arrays(FPGA)and CPU.This method uses FPGA as the concrete carrier for the implementation of time management mechanism.The CPU manages the mechanism adopted by the time management system.It makes full use of the design efficiency of the FPGA and the control flexibility of the CPU.And adaptability.At present,the solution has been applied to multiple aerospace missions.Practice has proved that the system has good performance,stable on-orbit working status,and high reliability.
作者 王德波 Wang Debo(Shandong Aerospace Electro-technology Institute,Yantai 264003,China)
出处 《电子测量技术》 2020年第10期24-29,共6页 Electronic Measurement Technology
关键词 卫星 时间管理 现场可编程门阵列(FPGA) CPU satellite time management system field programmable gate arrays(FPGA) CPU
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