摘要
提出了一种基于FPGA的64点定点快速傅立叶变换(FFT)的实现方案,并采用EP2C70型号的FPGA实现了处理器.该处理器采用按时间抽取的基-2算法和6级流水线结构,每级将乘法器的旋转因子输入端固定为常数而不是作为变量从ROM中读取,流水寄存中间数据结果.采用Verilog语言在RTL级上进行了编程实现,并进行了逻辑综合、时序仿真和硬件测试.硬件测试结果与Matlab计算结果吻合得较好,证明了方案设计和程序的正确性.该处理器具有运算速度快、精度高等优点,适合于高速信号处理的应用场合.
This paper presents a FPGA-based implementation method of 64-point fixed-point fast fourier transformer(FFT).A FPGA chip of the EP2C70 is used to achieve the processor.This processor adopts the method based on decimate in time Radix-2 algorithm and a 6 levels pipeline structure.In each level,the rotating factor inputs of multipliers are fixed to constants rather than read from ROM as variables.Intermediate datum is registered with pipeline function to be steady state.On the RTL,Verilog language is used in p...
出处
《西北师范大学学报（自然科学版）》
CAS
2008年第5期38-42,共5页
Journal of Northwest Normal University(Natural Science)
基金
国家自然科学基金资助项目(10674112)
