摘要
介绍了一种基于FPGA的4096点基-16FFT算法的实现方法。用Verilog语言完成系统设计描述,经过编译、综合和下载,给出了仿真测试的结果。本文采用块浮点和循环存储结构,避免了溢出和节省了大量的硬件资源。实验结果表明,该方法在保证了运算精度和实现复杂度的同时,使运算速度相对于基-4算法提高了一倍。
This paper shows how to realize the design and implementation of 4096 point fast Fourier transform module in field programmable gate array. The Verilog language is used to design the system, and after compiling, synthesizing and downloading, the simulation result is given. The adopt of block-floating-point avoid overflow and cycle storage structure save much hardware resource. Experimental results show that this method performs good accuracy and complication, and moreover can double the speed compared with ...
出处
《科技信息》
2008年第24期405-406,共2页
Science & Technology Information