摘要
为了应对传统设计方法在大规模系统设计中的高复杂度,特采用高层次综合技术设计具有并行流水结构的JPEG编码器,尝试不同的设计结构,得到性能、面积等折衷的最佳设计方案,并实现快速有效的综合与验证.与传统RTL实现相比,本流程集设计、综合、验证于一体,节省50%以上的设计周期.
Considering the high complexity of traditional design methods in large-scale system design,a kind of JPEG encoder with parallel pipelined structure is designed,adopting the High-Level Synthesis technology.Then an optimal trade-off solution of performance and area is obtainal,and a rapid and efficient synthesis and verification is realized.The process integrats design,synthesis and verification,saving more than 50%in design cycle,compared with traditional RTL process.
出处
《微电子学与计算机》
CSCD
北大核心
2015年第6期32-35,共4页
Microelectronics & Computer
