摘要
阐述了无人机中图象数据采集和缓冲模块的设计和实现。以FPGA为核心并综合利用FIFO和DDR-SDRAM设计了一个模块,可在200MBps数据率的情况下采集和缓冲图像数据。
As a kind of powerful weapons, UAV(Unmanned Aerial Vehicle) is used in many air actions to scout or to attack enemy's targets. But the digitalized image data stream captured by camera is too tremendous to process. In this article, a method is discussed to capture and buffer the high speed image data, and a module was designed which hardcore is FPGA. First convert the signal from LVDS level to LVTTL level, than buffer the data in switching memory space, at last transmit the buffered data to next module at the command. In this method, the module shows excellent performance over expected.
出处
《微电子学与计算机》
CSCD
北大核心
2004年第10期82-85,共4页
Microelectronics & Computer
