摘要
Verilog HDL 作为一种规范的硬件描述语言,被广泛应用于电路的设计中。他的设计描述可被不同的工具所支持,可用不同器件来实现。利用Verilog HDL 语言自顶向下的设计方法设计交通灯控制系统,使其实现道路交通的正常运转,突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点,并通过Xilinx ISE6 .0 2和Model Sim5 .6完成综合、仿真。此程序通过下载到FPGA芯片后,可应用于实际的交通灯控制系统中。
As a common language for the description of hardware, Verilog HDL is widely applied in circuit designing. The design description can be supportted by different tools and implemented by different devices.In this paper, the process of designing traffic light controller system by the Verilog HDL topdown design method is presented, which has made the road traffic work well, the design of this system has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Xilinx ISE6.02 and ModelSim5.6. The program can be used in the truly traffic light controller system by downloading to the FPGA chip.
出处
《现代电子技术》
2005年第8期103-104,107,共3页
Modern Electronics Technique
