摘要
讨论了用Verilog硬件描述语言来实现USB设备接口IP核的方法,并进行了FPGA的验证。简要介绍USB系统的体系结构,重点描述USB设备接口IP核的结构划分和各模块的设计思想,最后给出FPGA验证方案及其实验结果,结果表明此IP核可作为一个独立的模块嵌入到SoC系统中。
An approach to implementing USB device interface IP Core with Verilog Hardware Description Language and its FPGA implementation are presented. In addition to the system architecture of USB, the structure of USB device interface IP Core and the design idea of each module are described in particular. The result of FPGA implementation indicates that this IP Core is suitable for what is expected and can be used into other SoC applications as a single module.
出处
《微电子学与计算机》
CSCD
北大核心
2005年第3期39-42,共4页
Microelectronics & Computer
