摘要
CPLD是PLD的家族成员之一,它比一般的PLD具有更高的集成度、良好的工作可靠性和稳定性。用CPLD作频率计数字电路的核心部件,可简化频率计的硬件电路,提高系统的工作速度,节约设计与制造成本。文中介绍了用CPLD设计制作十进制数字频率计系统的方法。
The CPLD is one of the PLD household members. Compared with the general PLD, it has higher integration and better stability. Using CPLD as the core of the circuit, it can simplify the hardware circuit, improve operational speed and save production cost. At last, the method of using CPLD to make decimal numerical frequency system is expounded in this article.
出处
《重庆科技学院学报（自然科学版）》
CAS
2005年第1期76-79,共4页
Journal of Chongqing University of Science and Technology：Natural Sciences Edition
