摘要
系统级建模是大规模集成电路设计的一个重要阶段,它实现了设计从文本规范向功能实现的过渡,传统方法中一直使用硬件描述语言(HDL)来完成系统级建模,其弊端在于建模的效率低不适应如今SoC设计的要求。SystemC作为一种基于C++语言的新型硬件设计语言较已有的HDL语言在系统级建模、软硬件协调设计方面更具优势,因此也更适用于SoC的设计建模,该文介绍了SystemC的最新版本SystemC2.0的使用特点以及如何利用其进行SoC顶层设计的方法,并通过对一个短消息平台的建模实例说明如何具体使用SystemC2.0,通过与传统方法的比较可以得出结论,SystemC可以迅速有效地实现SoC系统级的建模。
<Abstrcat>The system-level design is a key part of VLIS(very large scale integration), and it is a bridge between specification and functional completion. The traditional method is to build the system model by using HDL(hardware design language), but the efficiency is low and not fit to SoC(system on chip) design. As a new hardware design language based on C++ language, SystemC is more suitable for system level design than HDL. The newest version of SystemC2.0 and the usage of it are introduced in this article. At last, we show an example of messages broadcasting which is modeled in SystemC2.0, and the result shows that SoC system level design can be rapidly finished by SystemC2.0.
出处
《计算机仿真》
CSCD
2005年第5期78-81,共4页
Computer Simulation
