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EPON系统中突发接收的CDR电路研究与设计 被引量:1

A CDR Circuit for the Burst Mode Receiver EPON
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摘要 在吉比特级EPON的突发式接收模块中,时钟数据恢复是关键技术之一。在对现有几种时钟数据恢复技术进行对比研究后,提出一种基于改进比特门控振荡器的即时锁定技术。它提升了占空比区分容限,抑制了时钟恢复级的数据的抖动,构造出更加适合吉比特级的时钟数据恢复电路。测试结果表明,对于8B10B码和伪随机码,CDR电路均达到预期的指标要求。 In the burst mode receiver of the G bit EPON system, the clock and data recovery circuit is one of the key technologies. After comparing several CDR (Clock and Data Recovery) circuits, a new clock and data circuit based on the modified gated oscillator is proposed. The proposed circuit improves the duty - cycle variation tolerance, rejects the jitter of input data and has a better performance in the G bit EPON system. Tests show that the circuit operates as desired for 8B10B line code and PRBS.
作者 梁慜
出处 《武汉理工大学学报(信息与管理工程版)》 CAS 2005年第5期93-96,共4页 Journal of Wuhan University of Technology:Information & Management Engineering
基金 湖北省科技攻关计划资助项目(2002AA101A04)
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参考文献2

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共引文献2

同被引文献7

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