摘要
介绍了1000 BASE-T物理编码子层(PCS)采用的4D-PAM5编码算法,分析编码算法中的一些关键性技术.提出解码流程,并给出了解码中字同步算法及其硬件结构.用Verilog HDL完成了PCS的硬件设计,进行了仿真验证,并给出了流片测试结果.
The 4D-PAM5 encoding system used for PCS of 1000 BASE-T is presented. Some key technologies are analyzed. The method of decoding is suggested and the synchronization algorithm is discussed in detail. The PCS is designed with Verilog HDL and passed its function is verified. The test result is also shown.
出处
《复旦学报（自然科学版）》
CAS
CSCD
北大核心
2006年第1期16-20,共5页
Journal of Fudan University：Natural Science
