摘要
为了研究流水线A/D转换器结构和进一步提高转换器的性能,本文A/D转换器采用全差分结构形式,并利用Pspice对全差分结构流水线A/D转换器基本模块进行了行为建模和仿真。为了验证行为模型的正确性。利用这些基本模型设计了一个1.5位/级10位流水线A/D转换器系统,并进行了仿真,最后给出了模拟结果。
In order to research the structure of pipelined ADC and improve its performance, Full-differential structure is introduced in this paper, The behavioral modeling and simulating of each basic block of full-differential pipelined ADC are presented by using Pspice. To verify these behavioral models, a 10 bit pipelined ADC is designed and simulated, and the results of the simulation are reported.
出处
《信息技术与信息化》
2006年第1期73-76,共4页
Information Technology and Informatization
