一种基于时段演算的VHDL的形式语义
A formal semantics of VHDL based on duration calculus
摘要
VHDL是一种广泛使用的硬件描述语言。其语义的形式化描述对于VHDL的使用及实现具有重要意义。本文提出了一种基于时段演算的VHDL的形式语义。
VHDL is one of the IEEE-standard hardware description languages. Formal semantics based on Duration Calculus are presented here. This kind of formal semantics will be useful for formal verification.
出处
《电路与系统学报》
CSCD
北大核心
2006年第2期12-16,共5页
Journal of Circuits and Systems
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