摘要
针对信道化滤波器要求运算速度快、消耗资源多、难以实时处理的突出问题,从多相滤波器,信道化滤波器的结构、原理和运算效率分析出发,推导了一种基于多相带通结构的信道化滤波器算法模型。这种算法将现有多相结构信道化滤波器模型中的低通设计改为带通设计,实现了复数乘法运算全部集中在带通滤波环节当中,并采用协调分级DFT算法的实现方案,大幅度节省了硬件资源,提高了运算效率,实现了信道化滤波器在通用FPGA和DSP芯片中的实时处理,硬件仿真结果验证了算法模型的正确性和有效性。
The demand of high-speed and huge consuming resource is the bottleneck ,and it limits the real-time processing of the channel filter. A channel filter algorithm based on polyphase structure with band-pass filters is deduced from the analysis of the structure, the principle and operation efficiency of polyphase and channel filters. The multiplication operation is centered on the polyphase filter stages through changing the low-pass filter in polyphase structure of a channel filter model as the band-pass filter in this algorithm, and DFT operation is performed in FPGA and DSP with two stages. Real-time processing of channel filter is achieved in the current FPGA and DSP with far less resources and efficient operation. The correctness and the validity of the algorithm model is proved by the hardware simulation.
出处
《数据采集与处理》
CSCD
北大核心
2006年第2期133-136,共4页
Journal of Data Acquisition and Processing
基金
某部委基金资助项目
关键词
多相滤波器
信道化滤波器
高效算法
带通滤波器
polyphase filters
channel filters
high efficiency algorithm
band-pass filter
