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1200V MR D-RESURF LDMOS与BCD兼容工艺研究 被引量:10

Design of a 1200V MR D-RESURF LDMOS and BCD Technology
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摘要 提出具有p埋层的1200V多区双RESURF(MRD-RESURF)LDMOS,在单RESURF(S-RESURF)结构的n漂移区表面引入多个p掺杂区,并在源区下引入p埋层,二者的附加场调制器件原来的场,以改善其场分布;同时由于电荷补偿,提高了漂移区n型杂质的浓度,降低了导通电阻.开发1200V高压BCD(BJT,CMOS,DMOS)兼容工艺,在标准CMOS工艺的基础上增加pn结对通隔离,用于形成DMOS器件D-RESURF的p-top注入两步工序,实现了BJT,CMOS与高压DMOS器件的单片集成.应用此工艺研制出一种BCD单片集成的功率半桥驱动电路,其中LDMOS,nMOS,pMOS,npn的耐压分别为1210,43·8,-27和76V.结果表明,此兼容工艺适用于高压领域的电路设计中. A 1200V multi-region double RESURF LDMOS with a p-type buried layer,which has multiple p regions in the n- drift layer of a single RESURF structure is proposed for improving the surface electric field,increasing the concentration of the n-drift layer,and reducing the on-resistance of LDMOS. A 1200V BCD technology based on standard CMOS technology is realized by adding pn isolation and p-top implantation. Using this technology we develop a power half bridge driver. The breakdown voltages of the LDMOS,nMOS, and pMOS are 1210,43.8, and - 27V,respectively, the BVceo of the npn is 76V in the driver. The 1200V BCD technology thus can be used in the design of HVIC.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第8期1447-1452,共6页 半导体学报(英文版)
基金 国家自然科学基金(批准号:60436030) 国家"十五"军事电子预研(批准号:41308020210)资助项目~~
关键词 多区 LDMOS RESURF BCD工艺 MR LDMOS RESURF BCD technology
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参考文献11

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