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基于集成门极换流晶闸管的中压三电平逆变器的驱动脉冲优化设计及复杂可编程逻辑器件实现 被引量:4

Optimal Drive Signals Design and Implementation in CPLD for Medium Voltage Three-level Inverter Equipped With IGCTS
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摘要 基于IGCT的中压三电平逆变器正被广泛地应用于工业领域。在这些逆变器中,IGCT的PWM驱动脉冲信号在进入门极单元之前需要进行处理,以确保驱动脉冲的死区时间和最小脉宽等设置。该文以MVA三电平逆变器为实例,根据开关器件特性、电路参数和控制要求,给出该逆变器驱动脉冲优化设计过程,包括关键参数计算和实现流程。该文采用双CPLD(复杂可编程逻辑器件)的方式给出驱动脉冲优化的实现流程,并为故障处理提供快速通道。文中给出了CPLD实现的仿真和实验结果,结果表明该驱动脉冲优化设计和实现是逆变器安全可靠工作的有力保证。 IGCT-based (Integrated Gate Commutated Thyristor) medium voltage three-level inverters are widely used in industry. To ensure the value of dead time and minimum pulse width, the PWM drive signals of IGCT require processing before entering IGCT gate units. This paper presents a novel drive signals optimal method for a MVA three-level inverter. The process of the design includes parameters computation and flow implementation, which are based on the IGCT characteristic, circuit parameters and control requirements. Dual-CPLD (Complex Programmable Logic Device) structure is employed to implement optimal flow design and provides a fast faults handling. This method is verified by the results of simulation and experiments, which is an efficient improvement for the reliability and security of inverters.
出处 《中国电机工程学报》 EI CSCD 北大核心 2006年第17期51-56,共6页 Proceedings of the CSEE
关键词 电力电子 三电平逆变器 集成门极换流晶闸管 死区 最小脉宽 复杂可编程逻辑器件 power electronics three-level inverter integrated gate commutated thyristor dead time minimum pulse-width complex programmable logic device
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