摘要
H．264标准在基本档次和扩展档次中采用CAVLC熵编码,完成对变换系数残差块的编码。提出一种基于FPGA的H．264标准的CAVLC编解码器,程序代码用verilog硬件描述语言编写,并在Qu- anusⅡ中进行了仿真验证,可以实现对每个残差块数据的编解码并将其按照宏块光栅扫描的顺序输出到存储器,因此适合于嵌入在最终的码流中。仿真结果表明此CAVLC编解码器达到H．264标准中基本档次和扩展档次level3．0的性能要求。
As a entropy coding method adopted in baseline and extended profile in H. 264 standard, CAVLC is used to encode residual blocks of transform coefficients. A CAVLC CODEC of H. 264 standard based on FPGA is presented in this paper, the codes are written in verilog HDL, and simulated and verified in QuartusⅡ. It can not only encode but also decode the data of each residual block and then put the data into the memory in the order of macroblock raster-scan. , in this way the data can be set in the uhimate data stream. Result shows that it can achieve a performance conforming to the baseline and extended profile at level 3.0 in H. 264 standard.
出处
《中国有线电视》
2006年第21期2109-2112,共4页
China Digital Cable TV
