摘要
介绍了一种超高速4∶1复接器集成电路。电路采用0.18μm CMOS工艺实现,供电电源1.8 V。电路采用源极耦合场效应管逻辑,与静态CMOS逻辑相比具有更高的速度。为了避免高速时序电路中常见的时钟偏差,在时钟树中放置了缓冲器。在设计中采用有源电感的并联峰化技术有效地提高了电路工作速度。仿真结果表明最高速度可达13.5 Gbit/s,电路功耗约313 mW,复接器芯片面积约0.97×0.88 mm2。
A 4-to-1 multiplexer IC for high-speed operation is presented in this paper. The IC is fabricated in a 0. 18 μm siandard bulk CMOS technology and uses 1.8 V supply voltage. SCFL circuits are used because of the higher speed compared to static CMOS. In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree. Inductive shunt peaking with active inductors is used to increase the speed of the IC. The simulation results show that the MUX works up to 13.5Gbit/s and consumes about 313 mW. Its size is about 0.97 ×0.88mm^2.
出处
《电子工程师》
2007年第5期12-14,24,共4页
Electronic Engineer
基金
南京理工大学科研发展基金(AB96142)
