摘要
研究了半导体生产线上有加工类型限制的并行批处理机组调度问题,其目标是最小化总加权拖期交货损失,从而最大程度地满足客户的按期交货要求。在研究了ATC-BATC和DBDH规则的基础上,提出了一种改进的ATC-BATC调度规则,通过反馈控制局部在制品数量来改善系统性能,并通过仿真证明该规则能更有效地减小总加权拖期交货损失。
The scheduling problem for parallel batching tools with incompatible families in semiconductor wafer fabrication was studied. To improve the performance of on-time delivery in semiconductor manufacturing, aimed to minimize the Total Weighted Tardiness （TWT）, an improved Apparent Tardiness Cost （ATC）-Batch Apparent Tardiness Cost （BATC） scheduling rule was proposed, which controlled SUBsection of Work in Process （SUBWlP）. Result of simulation showed that TWT was effectively reduced by proposed method.
出处
《计算机集成制造系统》
EI
CSCD
北大核心
2007年第6期1115-1120,共6页
Computer Integrated Manufacturing Systems
关键词
半导体生产线
批处理
调度
仿真
semiconductor wafer fabrication
batch processing
scheduling
simulation
