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一种基于频率抽取算法的3780点IFFT处理器设计 被引量:5

Design of 3780-Points IFFT Processor Based on Decimation in Frequency Algorithm
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摘要 提出一种基于频率抽取算法的3780点IFFT处理器的设计方法。该处理器采用流水线结构,实现分级的频率抽取算法IFFT,同时根据频域交织,实现输入输出之间位置倒序。软硬件仿真表明该处理器具有节省交织模块、易于扩展和模块可复用等特点,适用于符合国家标准要求的调制与解调系统。 This paper introduces the design of a 3 780 points IFFT processor based on decimation in frequency (DIF) algorithm. This pipelined processor can realize muhi-stage DIF-IFFT. Meanwhile, the frequency interleaving requirement can also reverse orders of input and output positions. The simulation results of software and hardware indicate that this processor eliminates the independent frequency-interleaving module, and can be expanded and re-configured easily. It can be used in modulator and demodulator system that complies with the Chinese national standard.
出处 《电视技术》 北大核心 2007年第10期19-21,35,共4页 Video Engineering
基金 国家863项目(2006AA01Z279)
关键词 3 780点IFFT 频率抽取 旋转因子 频域交织 3 780-points IFFT decimation in frequency rotation factor frequency interleaving
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