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基于数字PID补偿的降压型DC-DC控制器 被引量:2

A Buck DC-DC Controller with Digital PID Compensation
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摘要 设计了一个基于数字PID控制,可为低压系统提供稳定电源的多相位降压型DC-DC控制电路,包括flash ADC、数字PID控制器;并设计了一种新的基于延时单元/计数器的数字PWM电路,实现了一个降压型控制器。电路使用3.3 V CMOS工艺设计,芯片面积为0.16 mm2,输入电压3 V,输出电压1.25 V,负载电流最大800 mA,纹波小于10 mV,开关频率1 MHz,效率最高达到90%。 A buck DC-DC; controller with digital PID compensation was designed for low voltage applications. Analog to digital conversion, digital PID control algorithm and digital PWM were implemented in the circuit. An improved structure of hybrid delay-line/counter DPWM was used without dither patterns. And a look-up table based PID controller was designed using zero-pole matching. Finally, a flash ADC was used. The chip occupies 0. 16 mm^2 active area in 3. 3 V CMOS process. For 3 V input and 1.25 V output voltages, the circuit has a maximum load current up to 800 mA, a switching frequency of 1 MHz and a maximum efficiency up to 90%.
出处 《微电子学》 CAS CSCD 北大核心 2007年第5期692-695,699,共5页 Microelectronics
基金 信息产业部电子信息产业发展基金资助项目(信部运(2004)42号)
关键词 DC-DC变换器 降压型变换器 数字脉冲宽度调制 数字PID控制 DC-DC converter Buck converter DPWM Digital PID controller
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  • 1MILANOVIC M, TRUNTIC M, SLIBAR P. FPGA implementation of digital controller for DC-DC buck converter[C]//System-on-Chip for Real-Time Applications. Banff, Alberta, Canada. 2005: 439-443.
  • 2ERICKSON R W, MAKSIMOVIC D. Fundamentals of power electronics[M]. 2^nd Ed. USA: Kluwer Academic Publisher, 2001: 354-361.
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  • 4PETERCHEV A V, SANDERS S R. Quantization resolution and limit cycling in digitally controlled PWM converters[J]. IEEE Trans Power Electronics, Part 2, 2003, 18(1):301-308.
  • 5王海永,李永明,陈弘毅.一种采用电压补偿技术的DC/DC开关电源软启动电路[J].微电子学,2002,32(1):20-22. 被引量:17

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