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AES硬件实现的能量分析攻击仿真 被引量：2

Simulation of Power Analysis Attacks Against AES Hardware Implementation
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摘要 首先针对高级加密标准(AES)算法的硬件实现,给出了攻击时刻的汉明能耗模型;然后在行为级进行了基于寄存器数据变化的PA攻击;进一步通过对门级电路的功耗仿真,实现了能耗曲线数据的PA攻击。 Firstly a Hamming power model is used for modeling the power consumption of the hardware implementation of AES in this paper. Then we perform a power analysis attack based on bit transitions of registers against the behavior of the algorithm. Furthermore, a sound attack is executed with the power traces recorded by simulating the power consumption of the hardware implementation at gate level.
作者 韩煜 邹雪城 刘政林 陈毅成
机构地区 华中科技大学电子科学与技术系
出处 《微电子学与计算机》 CSCD 北大核心 2007年第12期47-49,54,共4页 Microelectronics & Computer
基金 湖北省自然科学基金项目(2006ABA080) 华中科技大学校基金项目(2006Z011B)
关键词 AES 汉明能耗模型 汉明权重 能耗分析(PA) 相关系数 AES hamming power model hamming-weight power analysis correlation factor
分类号 TP311 [自动化与计算机技术—计算机软件与理论]
  • 相关文献

参考文献7

  • 1Kocher P, Jaffe J, Jun B. Differential power analysis, in Advances in Cryptology-CRYPTO 99 [C]. Heidelberg, Germany: Springer-Verlag, 1999:398-412
  • 2Ors S B, Gurkaynak F, Oswald E, et al. Power-analysis attack on an ASIC AES implementation [A]. In the proceedings of ITCC 2004[C]. Las Vegas, 2004:5-7
  • 3Eric Brier, Christophe Clavier, Francis OliVer. Correlation power analysis with a leakage model [A]. CHES 2004[C]. LNCS 3156, 2004:16-29
  • 4刘鸣,陈弘毅,白国强.功耗分析研究平台及其应用[J].微电子学与计算机,2005,22(7):134-138. 被引量：16
  • 5National Institute of Standards and Technology (NIST). FIPS-197: Advanced Encryption Standard, November 2001. Available online at http://www.itl.nist.gov/fipspubs/
  • 6黄小苑,戴紫彬.基于FPGA的AES算法芯片设计实现[J].微电子学与计算机,2005,22(8):62-64. 被引量：5
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二级参考文献13

  • 1韦宝典.AES算法的密码分析与快速实现[J].中兴通讯技术,2004,10(4):23-26. 被引量：4
  • 2L T Mc Daniel. An Investigation of Differential Power Analysis Attacks on FPGA-based Encryption Systems.Master Thesis, Virginia Polytechnic Institute and State University, 2003, 29.
  • 3S B Ors, F Gurkaynak, E Oswald, B Preneel, Power-Analysis Attacks on an FPGA - First Experimental Results. CD. Walter et al. (Eds.): Cryptographic Hardware and Embedded Systems - CHES 2003, LNCS 2779,2003, 35-50.
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  • 7C Clavier, J S Coron, N Dabbous. Differential Power Analysis in the Presence of Hardware Countermeasures. In C.K. Koc and C. Paar,editors,Cryptographic Hardware and Embedded Systems - CHES 2000,volume 1965 of LNCS, Springle-Verlag, August 2000, 252-263.
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共引文献19

同被引文献17

  • 1陈毅成,邹雪城,刘政林,韩煜.针对高级数据加密标准的最大差分功耗分析[J].华中科技大学学报（自然科学版）,2007,35(11):96-98. 被引量：1
  • 2谢满德,沈海斌,竺红卫.对智能卡进行微分功耗分析攻击的方法研究[J].微电子学,2004,34(6):609-613. 被引量：3
  • 3KOCHER P, JAFFE J, JUN B. Differential power analysis [C]//Advances in Cryptology - CRYPTO. Heidelberg, Germany: Springer-Verlag. 1999: 398- 412.
  • 4MESSERGES T S, DABBISH E A, SLOAN R H. Examining smart-card security under the threat of power analysis attacks [J]. IEEE Trans Computers, 2002, 51 (5) : 541-552.
  • 5SCHGAGULER K. Assay of the DPA vulnerability of micro electric circuits based on FPGA measurements [D]. Austria: IAIK. 2005 : 33-39.
  • 6ORS S B, GURKAYNAK F K, OSWALD E, et al. Power-analysis attack on an ASIC AES implementation [C]//ITCC 2004. Las Vegas, USA. 2004: 546.
  • 7WADDLE J, WAGNER D. Towards efficient secondorder power analysis [C]//CHES'2004. LNCS 3156. Springer, 2004: 1-15.
  • 8BENINI L. A power modeling and estimation framework for VLIW-based embedded systems [C]//IEEE 11th Int Workshop Power and Timing Modeling, Optimization and Simulation. Yverdonles-Bains, Switzerland, 2001: 26-28.
  • 9Kocher P, Jaffe J, Jun B. Introduction to Differential Power Analysis and Related Attacks[EB/OL]. [2011-01-22]. http://www. -cryptography.com/dpa/technical. 1998.
  • 10Kocher P, Jaffe J, Jun B. Differential Power Analysis[C]//Proc. of CRYPTO'99. [S. 1.]: Springer-Verlag, 1999: 388-397.

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微电子学与计算机
2007年 第12期

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