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基于数字锁相的Ku波段频综器研究 被引量:5

The Study of Ku Band Frequency Synthesizer Based on DPLL
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摘要 针对一种Ku波段频综器阐述了基于数字锁相的跳频环路参数选择及对其相位噪声、杂散、稳定性的影响,研究了Ku波段频综器的设计思想,并对整体相位噪声进行了估计。工程实现结果表明,理论估值与实现结果基本一致。 Aiming at a kind of Ku band frequency synthesizer the article expatiates the selection of parameters for frequency hopping digital phase-locked loop and their effect on phase noise, spur and stability. It studies the design idea of the Ku band frequency synthesizer, and also estimates the whole phase noise. The result of engineering realization indicates that the result of theoretical estimation agrees with the system implementation.
机构地区 空军雷达学院
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2007年第4期481-486,共6页 Research & Progress of SSE
关键词 频综器 相位噪声 倍频器 谐波混频器 frequency synthesizer phase noise frequency multiplier harmonic mixer
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共引文献9

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