摘要
本文提出了利用DSP Builder来设计与实现非传统定点数加法器的新方法。DSP Builder是Altera公司推出的一个基于FPGA的系统级的数字信号处理开发工具,非传统定点数的加法器广泛应用于特殊用途的高速运算器中。本文采用优化技术,用DSP Builder设计与实现了基于SD编码的无进位延时的快速加法电路,通过计算机仿真,取得了满意的结果。
The article presents a novel method to design and implement a nontraditional fixed - point adder based on DSP Builder. DSP Builder is a digit signal process tool in FPGA, which is provided by ALTERA company. The nontraditional fixed - point adder is wildly used in high - speed calculator. Through code optimization, no - carry delay adder based on signed digit number is presented . By computer simulation, the result of the experiment is satisfying.
出处
《西安邮电学院学报》
2008年第1期10-13,共4页
Journal of Xi'an Institute of Posts and Telecommunications
基金
陕西省教育厅科学研究计划项目(06JK198)
关键词
FPGA
DSP
BUILDER
SD编码
无进位延时
field programmable gate array
digit signal process builder
signed digit code
no-carry delay
