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漂移区表面阶梯掺杂LDMOS的击穿电压模型 被引量:1

A new analytical model of breakdown voltage for the SD LDMOS
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摘要 提出表面阶梯掺杂(SD:Step Doping on surface)LDMOS的二维击穿电压模型.基于求解多区二维Poisson方程,获得SD结构表面电场的解析式.借助此模型,研究其结构参数对击穿电压的影响;计算优化漂移区浓度和厚度与结构参数的关系,给出获得最大击穿电压的途径.数值结果,解析结果和试验结果符合较好.漂移区各区和衬底电场相互调制,在漂移区中部产生新的峰值,改善电场分布;高掺杂区位于表面,降低了正向导通电阻.结果表明:SD结构较常规结构击穿电压从192V提高到242V,导通电阻下降33%. In this paper, a novel analytical model for breakdown voltage of SD LDMOS is developed. Based on the 2-D Poisson' s solution, the model gives the analytical solutions of the surface potential and electrical field distributions as functions of the structure parameters and drain bias;and the dependence of breakdown voltage on structure parameters is calculated. An effective way to attain the optimum high-voltage devices is also proposed. All analytical results were verified by simulation results obtained by MEDICI and previous experimental data, showing the validity of the present model. As a result of the modulation of the drift region and subtrate' field,the on-resistance is decreased and new electrical field peak are produced inside the drift region which improves the surface electrical field distribution and increases the breakdown voltage. The SD structure led to a significant improvement of breakdown voltage of about 26% and a reduction of on-resistance of about 33 % compared to the conventional structure.
出处 《物理学报》 SCIE EI CAS CSCD 北大核心 2008年第3期1891-1896,共6页 Acta Physica Sinica
关键词 优化 调制 表面阶梯掺杂 二维击穿电压模型 漂移区 高压集成电路 step doping, model, optimization, modulation
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参考文献15

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