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1.8V音频Σ-Δ调制器设计与实现 被引量:2

Design and Realization of a 1.8 V Σ-Δ Modulator for Audio Application
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摘要 介绍了一种适用于数字音频应用的16位8 kHzΣ-Δ调制器,该电路采用单环三阶、单比特量化形式;为适应较低电压,采用带密勒补偿的两级运放。仿真结果显示,调制器在128倍过采样率时,带内信号信噪比可达到102.6。该电路采用UMC 0.18μm混合信号工艺实现,工作电压为1.8 V,芯片版图面积为1.3 mm×1.3 mm。 A 16-bit 8-kHz ∑-Δ modulator for digital audio application was presented. A single-loop 3rd-order single-bit structure was adopted for the modulator, and a two-stage Miller compensated OTA was used to satisfy the requirements for low voltage applications. Simulation results showed that the modulator can achieve 16. 75-bit SNDR in 8-kHz signal bandwidth with an oversampling ratio of 128. Implemented in UMC' s 0.18μm CMOS mixed signal technology, the modulator has a layout area of 1. 3 ram× 1.3mm, and its supply voltage is 1. 8 V.
出处 《微电子学》 CAS CSCD 北大核心 2008年第2期226-230,共5页 Microelectronics
基金 国家自然科学基金资助项目(60475018)
关键词 A/D转换器 ∑-Δ调制器 模拟集成电路 A/D converter Sigma-delta modulator Analog integrated circuit
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参考文献10

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同被引文献14

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