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一种改进型高性能CMOS锁相环电荷泵的设计 被引量：2

Design of a Modified High Performance CMOS Charge Pump for PLL
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摘要 设计了一种高性能锁相环电荷泵电路.该电路采用UMC 0.18μm Mix-Mode CMOS工艺实现.仿真结果表明,通过利用电荷共享加速电流镜的开启,该电荷泵开启时间仅为0.3 ns,不会产生鉴相死区,能较好地抑制时钟馈通、电荷注入等非理想特性的影响,并且适合于低电压工作.通过与传统型及参考型两种电荷泵电路的仿真对比,验证了所设计电荷泵的优越性. A high performance charge pump circuit for phase-locked loop （PLL） was designed in UMC 0.18μm Mix-Mode CMOS process. The simulation results indicate that , by taking advantage of charge-sharing, this charge pump circuit can turn on in 0.3 ns, as a result of which the deadzone is eliminated. Besides, nonideal characteristic caused by clock feedthrough and channel charge injection effect is also reduced. This circuit is also suitable for low voltage application. By comparing the simulation result with other two charge pumps, the advantage of this design is validated.
作者 汪祥 戎蒙恬
机构地区 上海交通大学电子工程系
出处 《上海交通大学学报》 EI CAS CSCD 北大核心 2008年第4期629-633,共5页 Journal of Shanghai Jiaotong University
基金 国家自然科学基金委创新研究群体基金(60521002) 上海-应用材料研究与发展基金(0501 06SA09)资助项目
关键词 电荷泵 锁相环 互补型金属氧化物半导体 charge pump phase-locked loop complementary metal-oxide-semiconductor
分类号 TN43 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献8

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二级参考文献12

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共引文献91

同被引文献16

  • 1邢立冬,蒋林.2.5Gb/s 16:1复用器电路设计[J].微计算机信息,2008(11):264-265. 被引量：1
  • 2莫秉轩,陈钟鸣,鲁迎春.一种可用于高性能锁相环的CMOS电荷泵[J].合肥工业大学学报（自然科学版）,2006,29(3):369-372. 被引量：3
  • 3吴宏,陈吉华,陈怒兴.高性能锁相环中电荷泵电路研究[J].计算机工程与科学,2006,28(4):71-73. 被引量：5
  • 4陈永聪.集成CMOS锁相环中抑制参考杂散的设计方法[J].Journal of Semiconductors,2006,27(12):2196-2202. 被引量：4
  • 5Lee T,Samavati H,Rategh H.5-GHz CMOS Wireless LANs.IEEE Trans on Microwave Theory,2002,50(1):268-280.
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  • 9Kuo Yuefang,Weng Romin,Liu Chunyu.A 5.4-GHz Low-Power Swallow-Counterless Frequency Synthesizer with a Nonlinear PFD.IFIP International Conference on Very large Scale Integration,2006,357-360.
  • 10Ping Yan,Lu Zhiqiang,Ye Yizheng.A Double-Edge Triggered Phase Frequency Detector for Low Jitter PLL.ICSICT′06.8th International Conference on Solid-State and Integrated Circuit Technology,2006:1963-1965.

引证文献2

二级引证文献1

上海交通大学学报
2008年 第4期

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