摘要
在数据通信中,提高数据在通信中的可靠性,以及快速的数据处理能力一直是人们所追求的,循环冗余校验CRC就是一种广泛采用的差错控制方法,也是一种最常用的信道编码方法。在介绍CRC码原理之后,以经典的LFSR电路为基础,推导出产生32位并行数据的CRC-16编码表达式,用EDA工具设计出CRC-16编码模块,并对其进行综合仿真,验证其可行性。
What people have been pursuing, in data communication, is its data reliability as well as the highly efficient data processing capability. CRC （Cyclic Redundancy Check） is a method commonly used for error control and channel coding. Introducing the theory of CRC and basing on classic LFSR circuit, the paper inferred the CRC -16 encoding formulation with 32 bits parallel data, designed the CRC -16 encoder with EDA, and furthermore implemented a comprehensive stimulation which confirmed the feasibility.
出处
《河池学院学报》
2008年第2期74-79,共6页
Journal of Hechi University
