摘要
时钟同步是很多网络应用的基本要求.文中设计实现了基于环状拓扑的分布式多主机时钟同步系统.该系统使用面向单向延迟测量的Altair&Vega方法支持多台主机相互之间的时间同步,使用动态环状逻辑拓扑的控制方案,利用特有的环状拓扑上的累积误差提高系统的精度,得到了高精度的相对时钟偏移修正方案.在实验环境下进行的测试结果表明,该方法利用积累误差修正可以得到毫秒级的同步结果.
Clock synchronization is a basic requirement for many network applications. In this paper, a distributed multi-host clock synchronization system based on ring topology is designed and implemented. In the proposed system, the Altair & Vega method oriented to one-way delay measurement is adopted to realize the synchronization between multiple hosts, and the dynamic logic ring topology approach and the accumulated synchronous errors on the ring topology are employed to improve the system accuracy. Thus, a high-precision correcting method of relative clock skew is proposed. Test results indicate that the synchronization precision of the proposed method can be controlled in millisecond scale due to the accumulated error revision.
出处
《华南理工大学学报(自然科学版)》
EI
CAS
CSCD
北大核心
2008年第4期80-85,共6页
Journal of South China University of Technology(Natural Science Edition)
基金
国家"973"计划资助项目(2003CB314804)
华南理工大学广东省计算机网络重点实验室开放基金资助项目(CCNL200706)
关键词
时钟同步
环状拓扑
单向延迟
相对时钟偏移
clock synchronization
ring topology
one-way delay
relative clock offset