摘要
探讨了一种基于SOPC(System on a Programmable Chip)的低电压电泳芯片系统平台设计方案。以基于FPGA内嵌NiosII软核处理器为系统控制模块,运用SOPC Builder定制低电压电泳芯片运动梯度电势施加控制器、Avalon流模式的电导检测的IP核,实现芯片高速控制与电泳信号采集。文中具体阐述了该系统软、硬件总体结构、多CPU协调工作原理、运动梯度电势的控制原理以及电导检测采集IP核的设计。
A kind of approach about a system platform of low voltage integrated capillary electrophoresis chip based on SOPC. NiosⅡ embedded IP core CPU in FPGA acts as the controlling module of the system, and the moving grade electrical field controller for low voltage integrated capillary electrophoresis chip and IP core of electric detection based on Avalon flow model, which are defined by SOPC Builder software, are used to implement high-speed controlling of chip and acquiring of capillary signal. In this article, the global structure of software and hardware configuration of the system, the working theory of multi-processors, the controlling theory of moving grade electrical field and the design of electric detecting IP core has been discussed in detail.
出处
《微计算机信息》
北大核心
2008年第17期129-131,共3页
Control & Automation
关键词
NiosⅡ软核处理器
SOPC
低电压毛细管电泳芯片
控制与采集
NIOSⅡ soft-core processor
SOPC
low voltage integrated capillary electrophoresis chip
controlllng and acquiring
