摘要
在研究JTAG标准和ARM7TDMI处理器调试模块的基础上,提出调试ARM7TDMI处理器的软硬件实现方案。采用简易JTAG接口,通过计算机并口控制测试访问端口。该软件采用3层结构,共有7个模块。该文分析层次、模块的划分及接口的定义和实现过程。实验测试结果表明,该软件具有良好的实用性、可调试性。
Based on research of JTAG standard and the ARM7TDMI debugging model, this paper proposes the hardware and software solution of debugging ARM7TDMI, The easy JTAG is introduced to control Test Access Port（TAP） by computer parallel port. The software is three-level structure and contains seven models. It discusses the level, model partition, and the definition and implementation of interfaces. Experimental results demonstrate that the software has good practicability and debuggability.
出处
《计算机工程》
CAS
CSCD
北大核心
2008年第15期252-254,共3页
Computer Engineering
