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基于FPGA的FIR数字滤波器的设计与实现 被引量:5

Design and Realization of FIR Digital Filter Based on FPGA
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摘要 介绍了基于FPGA的FIR数字滤波器的设计与实现,该设计利用Matlab工具箱设计窗函数计算FIR滤波器系数,并通过VHDL层次化设计方法,同时FPGA与单片机有机结合,采用C51及VHDL语言模块化的设计思想及进行优化编程,有效实现了键盘可设置参数及LCD显示。结果表明此实现结构能进一步完善数据的快速处理和有效控制,提高了设计的灵活性、可靠性和功能的可扩展性。 This paper introduces a design and realization of FIR digital filter based on FPGA. The design uses window function of Matlab toolbox to calculate FIR filter coefficient. Through VHDI. level of design, FPGA and MCU organic integration,C51 and VHDL used modular design and optimize programming,the effective realization of the keyboard can also set the parameters and LCD display,the results show that this structure can be further improved to achieve the rapid data processing and effective control, the design flexibility, reliability and extendibility function are improved as well.
作者 杨国庆
出处 《现代电子技术》 2008年第19期184-186,共3页 Modern Electronics Technique
关键词 FPGA 滤波器 VHDL 窗函数 模块化 可扩展性 FPGA filter VHDL window function modulization extendibility
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参考文献6

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二级参考文献14

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