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双栅氧LDMOS器件工艺技术的研究与改进 被引量:1

Study and Improvement on Etching Method of Double Gate Oxide in LDMOS Process
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摘要 双栅氧LDMOS器件刻蚀过程中极易造成多晶硅残留现象,降低了栅极和源区之间的击穿电压。改进了制备双栅氧LDMOS器件的方法,对于70 nm以下的栅氧厚度,采用保留整个厚栅氧器件区域栅氧的刻蚀方法,同时用一次多晶工艺代替二次多晶工艺,消除了多晶硅残留现象,减少了工艺步骤,提高了成品率;对于厚度大于70 nm或者100 nm的厚栅氧器件,除了以上的改进措施,还增加了一步光刻工艺,分别单独形成高压和低压器件的源漏区域。通过这些方法,解决了多晶残留问题,得到了性能更好的LDMOS器件,大大提高了成品率。 There is mostly some poly left on the region between gate and source when etching double gate oxide of LDMOS, which debase the break down voltage between gate and source. The fabrication process of LDMOS with double gate oxide down. For devices with gate oxide below 70 nm, The etching method that preserving the gate oxide on the whole region high voltage devices lie on was taken. Also we transfer double poly process to single. By which we reduce process steps and improve yield. For those beyond 70 nm or 100 nm, except for above measures, we add one more patterning step, so that we can implant ion into source/ drain region of low voltage devices and high voltage devices separately. By these methods, we obtain doublegate-oxide LDMOS with better performance, and improve the fabrication yield.
出处 《半导体技术》 CAS CSCD 北大核心 2008年第9期784-786,共3页 Semiconductor Technology
基金 国家重点基础研究发展计划资助项目(2003CB314705)
关键词 双栅氧刻蚀 LDMOS 栅源台阶高度 多晶残留 etching of double gate oxide LDMOS step between gate and source region poly left
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  • 1LI H, SONG L M, DU H, et al. High voltage CMOS process for field emission display drivers [ C ]//Technical Digest of the 18^th Int Vacuum Nanoelectronics Con. Oxford , UK, 2005 : 344- 345.
  • 2HUSSAIN S, HOLLAND P M, STARKE T, et al. New LDMOS transistor based on 0.6/spl mu/CMOS technology for power IC applications [C] // IEEE Int Conf on Semiconductor Electronics. Penang, Malaysia, 2002 : 169 -171.
  • 3HUSSAIN B, MICHEL D. High voltage devices and circuits in standard CMOS technologies [ M ]. Germany: Springer, 1999:1-2.
  • 4MALUF N I,REAY R J,KOVACS G T A. High-voltage devices and circuits fabricated using foundry CMOS for use with electrostatic MEM actuators [C]//The 8^th Int Conf on Solid-State Sensors and Actuators. Stockholm,Sweden, 1995 : 158-161.
  • 5LIU K W, HAN Z S, QIAN H, et al. Design and simulations of high voltage CMOS devices compatible with standard CMOS technologies[J]. Chinese J of Semiconductors, 2003 : 24 ( 7 ) : 758-762.
  • 6SUN W F, WU J H, LU S L, et al. High-voltage power integrated circuit technology using bulk-silicon for plasma display panels data driver IC [J]. Microelectronic Engineering, 2004 (1):112-118.

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