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FIPS乘加器架构的VLSI实现研究 被引量:1

Research on the VLSI Multiplier and Accumulator Implementation Based on the FIPS
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摘要 分析了Montgomery模乘算法及其几种实现方式,指出FIPS方式是适合乘加器结构VLSI实现的一种算法.给出了FIPS方式的数据通路和控制部分的实现方案.提出了在选择不同的操作数位宽的情况下,对具体实现的评价标准.结合具体数据分析了随着操作数位宽的变化,面积、速度和功耗指标的变化趋势,并对使用单乘法器和双乘法器的情况进行了比较. In this article, we analyze Montgomery multiplication and some ways to perform it. It is pointed out that FIPS mode is suitable for the implementation based on VLSI multiplier and accumulator structure. The data path and control structure based on FIPS mode are designed. We discuss the evaluation standard for the implementations based on different operand width. By using the experimental data, we analyze the differences in size, speed and power of the implementations based on different operand width. We also compare single multiplier mode with double multiplier mode.
出处 《微电子学与计算机》 CSCD 北大核心 2008年第12期50-54,59,共6页 Microelectronics & Computer
基金 国家自然科学基金项目(60576027 60544008) 国家"八六三"计划项目(2006AA01Z415)
关键词 MONTGOMERY算法 FIPS方式 乘加器结构 面积 速度 功耗 Montgomery algorithm FIPS mode multiplier and accumulator size speed power
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参考文献6

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共引文献10

同被引文献6

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  • 6刘壹,邱昕,亓中瑞,张浩,陈杰.OFDM分组检测算法的研究及其VLSI实现[J].微电子学与计算机,2008,25(12):161-164. 被引量:3

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