摘要
针对数字电视译码电路复杂,译码速度不高的特点,基于多项式带余除法的相关推论,提出一种改进型欧几里德算法.与传统欧几里德算法相比,该算法在求解关键方程的过程中能够较容易地得到错误值多项式和错误位置多项式,从而可以减少硬件电路的复杂性,提高译码速度.FPGA电路仿真结果表明该算法切实可行.
According to the complexity of decoding circuit in digital TV and the moderate speed of decoding, a modified Euclidean algorithm is proposed based on the related deduction of division with reminder of polynomials. Compared with the traditional Euclidean algorithm, the proposed algorithm can easily get error value polynomial and error locator polynomial in the process of solving key equation. Moreover, it can simplify the complexity of hardware circuit and improve decoding speed. The FPGA simulation results show that the modified Euclidean algorithm is feasible.
出处
《陕西科技大学学报(自然科学版)》
2008年第6期128-132,共5页
Journal of Shaanxi University of Science & Technology
关键词
RS码
多项式带余除法
关键方程
改进型欧几里德算法
FPGA仿真
Reed-Solomon code
division with reminder of polynomials
key equation
modified Euclidean algorithm
FPGA simulation