摘要
对数字匹配滤波器的原理和结构进行了简要的介绍,重点给出了在现场可编程门阵列(FPGA)中数字匹配滤波器倒置结构的硬件实现。通过对设计电路的实时仿真表明:该数字匹配滤波器具有捕获精度高、速度快的特点,可应用于其它扩频系统的数字接收机中。
The principle and structure of a digital matched filter is introduced briefly with emphasis on the realization of the transposed structure of digital matched filter based on FPGA （ field programmable gate array ）. The simulation of the designed circuit indicates that this digital matched filter has advantages such as high capture precision and high speed, and it can be used in other digital spread spectrum receivers.
出处
《时间频率学报》
CSCD
2008年第2期114-120,共7页
Journal of Time and Frequency
