摘要
针对系统级芯片(SoC)测试壳优化和测试访问机制的测试总线划分问题,提出了基于蚁群算法的SoCWrapper/TAM联合优化方法.构造蚁群算法时首先进行IP核的测试壳优化,用于缩短最长扫描链长度,减少单个IP核的测试时间;在此基础上进行TAM结构的蚁群优化,通过算法迭代逼近测试总线的最优划分,从而缩短SoC测试时间.对ITC2002基准SoC电路进行实验的结果表明,该方法能有效地解决SoC测试优化问题.
To cope with the problem of test wrapper/TAM co-optimization of SoC, this paper proposes an ant colony algorithm as an optimization scheme. The research work includes two steps. Firstly, an ant colony optimization （ACO） algorithm for IP test wrapper is designed to shorten the length of the longest scan chain in the SoC chip and decrease the test time for single IPs. Based on the look up table acquired from the first step, ACO algorithm is applied in test wrapper/TAM co-optimization problem to decrease the test time for the entire SoC chip by approximating to the optimal result on test bus division. Experimental results on ITC＇02 benchmark circuits proved the effectiveness of the scheme.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
2009年第4期461-466,共6页
Journal of Computer-Aided Design & Computer Graphics
基金
广东省自然科学基金(5300314)
深圳市科技计划项目(SZKJ-2007019)
关键词
测试壳
蚁群算法
测试访问机制
系统芯片
test wrapper
ant colony algorithm
test access mechanism
system-on-chip
