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一种高电源抑制比的基准电压源设计

A simple bandgap voltage reference with high PSRR
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摘要 文章采用0.6μmN阱CMOS工艺,设计了一种高电源抑制比、低噪声的带隙基准电压源。在传统带隙基准电路结构的基础上,采用添加新的电压支路,在环路反馈网络中直接引进噪声的理念,提高了电源抑制比。利用Cadence Spectre工具仿真,结果表明,电路工作电压范围为2.5~5.5V,输出基准电压为1.2V,低频时电源抑制比可达到110dB,在-25~85℃范围内温漂为26×10^-4/℃,在10~1.0×10^5 Hz带宽范围内的RMS电压噪声为43μV,具有高电源抑制比、低输出噪声的特性。 In this paper, a bandgap voltage reference with high PSRR and low noise is proposed. The circuit is designed using the 0.6μm N well CMOS process. Based on the conventional bandgap reference circuit, a simple voltage subtractor circuit is incorporated. The subtractor feeds the supply noise directly into the feedback loop of the bandgap circuit which can help to suppress supply noise and improve the PSRR. The Cadence Spectre simulation result shows that the proposed bandgap voltage reference has a temperature coefficient of 26 × 10^-6℃ between --25 ℃ and 85 ℃ and the RMS noise of 43μV from 10 Hz to 100 kHz, and its PSRR gets to 110 dB at the low frequencies.
出处 《合肥工业大学学报(自然科学版)》 CAS CSCD 北大核心 2009年第4期564-567,共4页 Journal of Hefei University of Technology:Natural Science
关键词 带隙基准电压源 电源抑制比 输出噪声 温度系数 bandgap voltage reference power supply ripple rejection(PSRR) output noise temperature coefficient
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参考文献8

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