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Taxonomy of Data Prefetching for Multicore Processors 被引量：1

Taxonomy of Data Prefetching for Multicore Processors
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摘要 Data prefetching is an effective data access latency hiding technique to mask the CPU stall caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been developed for single-core processors. Recent developments in processor technology have brought multicore processors into mainstream. While some of the single-core prefetching techniques are directly applicable to multicore processors, numerous novel strategies have been proposed in the past few years to take advantage of multiple cores. This paper aims to provide a comprehensive review of the state-of-the-art prefetching techniques, and proposes a taxonomy that classifies various design concerns in developing a prefetching strategy, especially for multicore processors. We compare various existing methods through analysis as well. Data prefetching is an effective data access latency hiding technique to mask the CPU stall caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been developed for single-core processors. Recent developments in processor technology have brought multicore processors into mainstream. While some of the single-core prefetching techniques are directly applicable to multicore processors, numerous novel strategies have been proposed in the past few years to take advantage of multiple cores. This paper aims to provide a comprehensive review of the state-of-the-art prefetching techniques, and proposes a taxonomy that classifies various design concerns in developing a prefetching strategy, especially for multicore processors. We compare various existing methods through analysis as well.
作者 Surendra Byna 陈勇 孙贤和
机构地区 Department of Computer Science
出处 《Journal of Computer Science & Technology》 SCIE EI CSCD 2009年第3期405-417,共13页 计算机科学技术学报（英文版）
基金 supported in part by the National Science Foundation of USA under Grant Nos.EIA-0224377,CNS-0406328,CNS-0509118,and CCF-0621435.
关键词 taxonomy of prefetching strategies multicore processors data prefetching memory hierarchy taxonomy of prefetching strategies, multicore processors, data prefetching, memory hierarchy
分类号 TP332 [自动化与计算机技术—计算机系统结构] TP311.52 [自动化与计算机技术—计算机软件与理论]
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同被引文献32

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Journal of Computer Science & Technology
2009年 第3期

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