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基于FPGA的低成本GPS信号模拟器设计 被引量:1

Low Cost GPS Simulator Based on Single FPGA
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摘要 本文介绍了一种低成本的GPS信号模拟器的设计;根据GPS信号的数学模型,设计了采用FPGA实现所有基带处理功能的方案。利用码发生器产生GPS各卫星的伪随机码,采用数字延迟滤波器实现信号的延迟处理,采用多级采样率转化器和滤波器串联的方法提高延迟精度,生成的多星基带信号在数字域进行叠加,再通过正交射频调制得到L1频点的GPS信号;该GPS信号模拟器结构简单,成本低,生成的GPS信号精度高,可以满足部分GPS接收机的测试需求。 This paper proposes a low cost GPS simulator. A system based on FPGA is constructed to realize base band signal process of GPS. Code generator generates pseudo number of each SV. Pseudo--range delay is simulated by cascaded digital delay filter. Multiple sampiing and cascaded filter are applied to raise delay accuracy. Base band signal of multiple SV are superimposed at digital field, then is orthogohal modulated to 1575.42MHz frequency. The GPS simulator is simple and low cost. The generated signal is accuracy enough to meet the test of most GPS receiver.
出处 《计算机测量与控制》 CSCD 北大核心 2009年第7期1365-1367,共3页 Computer Measurement &Control
关键词 GPS信号模拟 FPGA 数字延迟滤波器 GPS RF signal simulation FPGA digital delay filter
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共引文献37

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