摘要
在测控系统中,随着板卡或设备数目的增加,为确保各部分协调工作,提供统一的定时和同步信号变得越来越重要;针对这种需求,以定时和同步的基本原理为开发背景,研制了一种基于PCI总线的CPLD+DDS结构的定时同步产生系统,以一片PCI9030、一片EPM240和一片AD9954为主要芯片,构成了一个集时钟生成、路由及触发分配为核心的通用标准化的硬件,并详细介绍了该系统的软硬件设计方案;尤其在板卡的驱动程序设计方面,介绍了一种简单、快速的开发方法,该方法简化了传统的驱动程序开发过程,对基于PCI总线系统的研究,具有一定的借鉴意义,试验证明本卡达到了预期功能和要求。
In the background of the basic principles of timing and synchonization, a CPLD + DDS structure signal processing system based on PCI bus is designed and thus developing a general and standard hardware platform mainly with one CPLD (EPM240), one PCI9030 and one AD9954 chips. The designing project and realizing method of the hardware and software of the system are discussed in detail. Especially in aspect of the card drive program design, a simple and rapid development method for PCI card is explained and the method is of inno vation. The experimental results prove that the card fulfills anticipated functions and requirements.
出处
《计算机测量与控制》
CSCD
北大核心
2009年第7期1396-1398,共3页
Computer Measurement &Control