摘要
介绍一种宽范围、高稳晶振的频率稳定度测试系统设计,整个设计以铷原子钟为标准钟,采用直接数字频率合成技术,使用高分辨力频率计数器进行测量、计算,并由AVR单片机和CPLD可编程器件完成控制。实验结果证明,该设计不仅具备传统频稳测试系统的功能,而且又为解决非标准、高稳晶振的频率稳定度测试提供具体的方法。
A test system＇s design of a wide scope, high steady crystal oscillator frequency stability, which takes the direct digital synthesis technology as a core is introduced. Based on rubidium atomic clock, the frequency counter can be used in measurement and computation with high- resolution, which is controlled by AVR single- chip microcontroller and CPLD programmable device. The experiment results show that this design not only has traditional testing system but also provides a specific method to solve non - standard high steady crystal oscillator frequency stability of the test.
出处
《现代电子技术》
2009年第19期102-103,112,共3页
Modern Electronics Technique
关键词
晶振
频率稳定度
测试系统
高分辨力
直接数字频率合成
crystal oscillator
frequency stability
test system
high - resolution
direct digital synthesis
