摘要
卷积码作为通信系统中重要的编码方式,以其良好的编码性能,合理的译码方法,被广泛应用。在阐述卷积码编解码器基本工作原理的基础上,给出了(3,1,2)卷积编码器和(2,1,1)卷积解码器的VHDL设计,在Quartus Ⅱ环境下进行了波形仿真,并下载到EPF10K10LC84-3上进行了验证,其结果表明了该编解码器的正确性和合理性。
As an important coding method in communication system, convolutional code has been widely applied because of its favorable encoding performance and rational decoding method. This paper discusses the encoding and decoding principle of convolution code, and gives the VHDL design of （3,1,2） convolution encoder and （2,1, 1） convolution decoder. This design is simulated on Quartus Ⅱ and downloaded into the EPFIOKlOLC84-3 for demonstration. The results prove the correctness and rationality of the encoder and decoder.
出处
《通信技术》
2009年第10期72-74,共3页
Communications Technology
关键词
卷积码
编解码器
VHDL
convolution code
encoder and decoder
VHDL
