摘要
通过对电路三要素(信号、网络和负载)理论和五值代数理论的研究,提出了四值D触发器的元件级结构设计方案.根据可逆计数器的功能特性,采用该四值D触发器设计了具有复位功能的四值同步可逆计数器.PSPICE模拟验证所设计的电路具有正确的逻辑功能.
Through the research on the theory of three essential circuit elements（ signal, net and load） and five-valued algebra, this paper presented a novel element level design scheme of four-valued D flip-flop. Then based on the characteristic of reversible counter, four-valued D flip-flop was used as the core component to design four-valued synchronous reversible counter which has reset function. Finally, The PSPICE simulation results indicated that the novel scheme has correct logic function.
出处
《浙江大学学报（理学版）》
CAS
CSCD
北大核心
2009年第5期553-556,560,共5页
Journal of Zhejiang University（Science Edition）
基金
国家自然科学基金资助项目(60776022)
浙江省科技计划资助项目(2008C21166)
宁波大学博士
教授基金资助项目
关键词
电路三要素理论
四值逻辑
可逆计数器
电路设计
theory of three essential elements
four-valued logic
reversible counter
circuit design
