摘要
由于开关电容电路具有同标准CMOS工艺兼容性好、时间常数精确度高、电压线性度好等优点,在滤波器、A/D中得到广泛的应用。在开关电容电路中,一个必不可少的单元便是两相不交叠时钟产生单元,它产生不交叠时钟,控制节点不会同时被两个电压驱动;产生提前关断的时钟,以减少电荷注入效应的影响。分析了传统不交叠时钟的电路原理和时序,在此基础上提出了一种独立调节两相脉宽的不交叠时钟产生电路,并分析了它在ΔΣ调制器、流水线结构A/D以及滤波器中的应用前景。
Switched-capacitor circuits are compatible with CMOS technology, accurate in time constam and besides, have good linearity in voltage. Therefore, they are widely used in filters, A/Ds and other circuits. The two phase non-overlap clock generator is one of the building blocks of the switch capacitor circuit. It generates non-overlap clock to control nodes not to be driven by two voltage sources. It also generates earlier turn off clock which can solve the charge injection problem. This paper analyzes the traditional non-overlap clock generator in detail, and then gives one with independent pulse width adjusting. Finally it shows how it can help lowering the power consumption in ΔΣ modulators, pipeline A/Ds and filters.
出处
《半导体技术》
CAS
CSCD
北大核心
2009年第10期1032-1035,共4页
Semiconductor Technology
基金
"十一五"863计划重点项目(2008AA010700)
