摘要
根据AVS视频标准中的解码算法特点,提出一种改进的AVS解码器流水线控制机制。该流水线对解码模块采用两级控制策略,不同级别流水线中的解码模块数据处理粒度不同,节省了级间缓存。同时,合理安排数据处理顺序,减少了数据等待时间。仿真结果表明,该设计在不影响系统解码性能的基础上节省了大量的存储器资源。
According to the algorithm characteristics in AVS video coding standard,an optimized pipelining scheme was proposed. In this scheme,the hardware decoding modules worked on two different levels. Modules on different level had different data-processing granularity,and buffers between hardware modules were saved. With reasonable processing sequence,data waiting time between modules was reduced. The simulation and synthesis results indicate that a large sum of memory resources is saved without lowering performance of the decoder.
出处
《计算机应用》
CSCD
北大核心
2009年第11期3135-3138,共4页
journal of Computer Applications
关键词
AVS
视频解码
并行处理
流水线
硬件设计
AVS
video decoding
parallel processing
pipelining
hardware design
