摘要
基于现场可编程门阵列(FPGA),设计并实现了一个低复杂度的支持码分多址接入(CDMA)机制的水声直接序列扩频(UDSSS)通信系统——UADSSS/CDMA,给出了系统的整体设计和信道编码电路、信号捕获电路的详细设计。信道编码采用规则重复累积(RA)码,解码迭代算法采用低复杂度的最小和算法,给出了一种快速运算的电路设计;信号捕获电路采用延迟相关捕获算法,给出了一种低复杂度的基于流水线结构的电路设计。进行了水声试验平台测试、湖试、海试等性能测试,结果表明,系统在抑制多径干扰和支持多用户通信方面具有良好的性能:试验平台测试显示,单用户通信的误码率为10^(-4)数量级,存在两个用户干扰的误码率为10^(-3)数量级;湖试显示,零误码的数据包为74.8%;海试显示,零误码的数据包为34.4%。
Based on the technology of field programmable gate array （ FPGA）, a low complexity underwater acoustic direct sequence spread spectrum （UADSSS） communication system for CDMA based networks （UADSSS/CDMA） was designed and implemented. The whole design of the system and the design details of the channel coding module and the signal acquisition module were introduced. The regular repeat accumulating （RA） code was adopted in the channel coding module, and based on a low complexity minimum sum algorithm, a design for fast iteration was introduced. The delay correlation acquisition algorithm was used in the signal acquisition module, and a low complexity pipelining based implementation scheme was designed. The practical underwater acoustic communication tests based on a laboratorial test bench, a small lake and a shallow sea were carried out. The results showed a good performance of the designed system in supporting multi-user communication and suppressing multi-path interference. In the laboratorial test bench environment, the bit error rate （BEH） of the system in three-user communication is of the order of 10^-4, and that of the system in two-user communication is 10^-3. In the small lake test, 74.8% of the data packets were bit-correct. In the shallow sea test, 34.4% of the data packets were bit-correct.
出处
《高技术通讯》
EI
CAS
CSCD
北大核心
2009年第10期1006-1013,共8页
Chinese High Technology Letters
基金
863计划(2006AA09Z115)资助项目
关键词
水声通信
水声直接序列扩频(UADSSS)
低复杂度
RA码
延迟相关捕获
underwater acoustic communication, underwater accoust direct sequence spread spectrum （UADSSS）,low complexity, repeat accumulating （RA） code, delay correlation acquisition
