摘要
文章介绍了单片宽带实时频谱分析芯片的设计原理和方法,并在FPGA上进行了原型验证。设计中采用了基于多相滤波器组的下变频方案,并对下变频后每一路数据进行重叠加窗处理。为了减小芯片面积,对后端的FFT分析模块进行了优化设计,提出了将两条蝶形运算级合并为一条流水线的新型FFT设计构架。该设计可以不间断地处理数据,从而实现信号的无缝捕获。
This paper presents a design principle and method of the real-time wideband frequency analysis chip based on the sole chip. The circuit architecture on the FPGA chip for the prototype verification. In the design, the poly-phase filter bank is adopted as the Digital Down Converter （ DDC ） ,and each path of data channels after DDC is overlapped and windowed. In order to reduce the chip area, the back-end FFT analysis module is optimized and a new FFT architecture which combines two butterfly computing stages into one pipeline is also proposed. The design can process the data continuously and achieve the seamless capture of signals.
出处
《空间电子技术》
2010年第1期38-41,95,共5页
Space Electronic Technology
关键词
频谱分析
多相滤波器组
快速傅里叶分析
Frequency analysis Polyphase filter bank Fast Fourier Transform analysis
