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NAND Flash与AT91RM9200的接口设计 被引量:1

Interface Design between NAND Flash and AT91RM9200
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摘要 以三星公司的与非型闪存(NAND Flash)器件K9K8G08U0A为例,介绍了NAND Flash的存储结构和接口信号以及AT91RM9200对NAND Flash的接口支持,分析了NAND Flash两种接口方式的优缺点,阐述了AT91RM9200对NAND Flash的初始化过程,重点以表格形式说明了接口时序的设计,最后对坏块的概念和ECC校验算法原理做了简单的介绍。NAND Flash的复用I/O接口为更新更高密度的器件提供了相同的引线,使得系统的扩展性大大提高。 Through a detailed description of NAND Flash device K9K8G08U0A made by Samsung Corporation,the memory organization and the hardware interface signal of NAND Flash are introduced first,along with the interface support of AT91RM9200 to NAND Flash.The advantage and disadvantage of two NAND Flash interface modes are analyzed,and the initialization steps are described with focus put on the interface timing design.Finally,the bad block concept and the ECC algorithm are introduced.With multiplexed I/O interface,the higher density NAND Flash device has the same pin as the old one,which significantly improves system extensibility.
出处 《无线电通信技术》 2010年第2期40-42,共3页 Radio Communications Technology
关键词 NAND Flash AT91RM9200 接口时序 ECC NAND flash AT91RM9200 interface timing ECC
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