摘要
介绍了DDS+PLL技术的宽带扫频信号源的设计与实现。采用ADI公司的DDS芯片AD9858和Hittite公司的HMC440,FPGA控制DDS产生中心频率200M,带宽0～75MHz可变的线性扫频信号,采用DDS激励锁相环的锁相倍频技术将200M信号倍频到1.6GHz。实验证明:该方案设计的扫频源具有较高的频率分辨率和频率精确度,同时具有较好的杂散抑制,满足雷达系统应用的要求。
This paper describes the design of linear frequency sweep signal.By using ADI＇s AD9858 and Hittite＇s HMC440;FPGA controls DDS in generating linear frequency sweep signal with 200M central frequency and variable bandwidth from 0 to 75 MHz.And DDS spur PLL technology is used to multiple 200M signal to 1.6G.Experiment shows that this sweep signal source has much finer frequency resolution,high frequency accuracy and low spurious level,and could be used in radar system.
出处
《通信技术》
2010年第3期188-190,共3页
Communications Technology
关键词
线性扫频
锁相环
DDS
linear frequency sweep
phase lock loop
DDS
